Mitrionics MVP610 Hybrid Computing Server

Single Coprocessor System

Click here to download the
MVP610 product brief (PDF, 764KB)
 

Mitrionics hybrid computing servers combine the Mitrion™ Software Acceleration Platform with servers and FPGA acceleration coprocessor modules from leading vendors to deliver preconfigured solutions for running and developing accelerated applications.

Mitrionics MVP610 is a single FPGA system based on a dual socket HP ProLiant DL165 G5 rack mount server, and an in-socket FPGA module, ideally suited for text- and integer-based applications in genome informatics, internet data processing and business process optimization. The system includes:

Mitrion Virtual Processor
Mitrion Software Development Kit
HP ProLiant DL165 dual socket server with single 2.1GHz quad-core AMD Opteron™ 2352 CPU
XtremeData™ XD2000F in-socket FPGA accelerator with single Altera® Stratix® II FPGA
One year of e-mail support

Specifications

Software

Mitrion™ SDK
Mitrion-C Compiler
 Graphical Simulator
 Mitrion Virtual Processor Configuration Unit
 Mitrion Host Abstraction Layer API (MITHAL)
 Example Applications
 Altera® Quartus®II synthesis and place & route software

Drivers
 XtremeData drivers for Linux

MVP610
HP ProLiant DL165 G5

CPU
Single Quad-Core AMD Opteron™ Processor Model 2352 (2.1GHz)

Memory
4GB PC2-5300 DDR2 (2×2GB)

Storage
250GB 7200 RPM SATA-HDD,
DVD/CD-RW

Networking
Dual-port Gigabit Ethernet

Power
650 W Power Supply
(Non-Hot Plug, Autoswitching)

Rack Height
1U

Coprocessor Module
XtremeData XD2000F

FPGA
Single Altera® Stratix™II 2S180
 
Logic Size
179,400 (4LUT equivalents)

Memory
32 MB SRAM
(4 independent banks,
200 MHz QDR,
36 bits/bank,
1.6 GBps/port)

System Bus
HyperTransport™







Mitrionics MVP610 consists of an HP ProLiant DL165 G5 server, populated with one AMD Opteron™ processor and one XtremeData XD2000F FPGA Coprocessor Module. The XD2000F, installed in the second Opteron (1207) processor socket, uses the motherboard’s existing CPU infrastructure to create a full-featured environment for FPGA coprocessor functions. The high- bandidth, low-latency HyperTransport™ link between the XD2000F and the CPU enables tightly-coupled FPGA acceleration of ×86 applications.

System Overview