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FPGA-based Hybrid Computing Systems
FPGA-based hybrid computing systems are typically built using FPGA modules. These FPGA modules are connected to a hosting computer system through a variety of system bus architectures, depending on the system and module.
A typical FPGA module in a hybrid computing system
In addition to control and interface logic, the modules hold one or more FPGAs for user algorithms and usually have local memory attached directly to the FPGAs. Some modules allow the FPGA to read and/or write directly from or to the host system’s memory. The varying properties of the FPGA modules must be taken into account when developing accelerated applications, and each module has its performance bottle-necks and sweet spots.
Board Adaptation Layer
In order to make it possible for the users of hybrid computer systems to use the FPGA modules, vendors supply a board adaptation layer, circuit designs and configuration files for the FPGA that provide interfaces to the components of the FPGA module and communication to and from the host system. The user algorithm circuit connects to this board adaptation layer to access system resources.
Board Adaptation Layer
Software Interface
The Mitrion Software Acceleration Platform, as well as the module vendors, provide Application Programming Interfaces, APIs, to allow the host system to communicate with and control the FPGA module. The APIs provide functionality to:
Reserve FPGAs from the operating system.
Upload bitstreams to the FPGA.
Start and stop algorithm execution on the FPGA.
Transfer data to and from the FPGA and/or locally attached memories.
Monitor status of the algorithm executing on the FPGA.Developing Accelerated Applications
Development of FPGA-accelerated software adds two steps to the software development cycle:
Deciding on the partitioning of the application between the host CPU and the FPGA.
The design and implementation of the tailored co-processor circuit that will run the accelerated algorithm on the FPGA.The Mitrion Platform addresses the later through the Mitrion Virtual Processor, a design for an adaptable parallel processor capable of efficiently running software on the FPGA. With the Mitrion Platform, the steps of deploying FPGA-acceleration to an application are:
Identify the computationally intense routines of the application and decide on a partitioning of tasks between CPU and FPGA.
Rewrite the routines that are to run on the FPGA in the high level Mitrion-C programming language.
Replace the routines in the original program with calls to the FPGA.
Use the Mitrion Software Development Kit to debug the Mitrion-C routines and their interaction with the host program.
Use the Mitrion SDK and FPGA vendor tools to generate configuration files for the FPGA.
Install and run on target system.
Running accelerated applications
FPGAs Compared to Microprocessors
FPGAs represent a computer architecture ideally suited to exploiting parallel execution. They are able to run some algorithms 10-100 times faster than a microprocessor. It is, however, important to note that:
An FPGAs is not a better microprocessor, nor a microprocessor substitute.
FPGAs will not accelerate existing applications without significant porting efforts, and not all algorithms are suitable for FPGA acceleration.Compared to microprocessors, FPGAs have a couple of major performance disadvantages:
The maximum clock frequency for FPGAs is a few hundred MHz, while microprocessors run at a few GHz.
The FPGAs configurability comes at the cost of a large overhead, leaving 10-100 times less logic available to the user compared to a microprocessor of similar size.The reasons FPGAs are still able to outperform microprocessor for some algorithms are:
The FPGA is used to implement a circuit specialized for a specific task.
All the logic on the FPGA can be utilized to perform the task.
FPGAs deliver vast amounts of parallelism.
FPGAs offer huge memory bandwidth through configurable logic, block RAM and local memories. See the table below:| FPGA | Microprocessor |
|
Configurable logic TB/sec 10’s KB |
On Chip Registers 100’s GB/sec 1-10’s KB |
|
Internal RAM 100’s GB/sec 100’s KB |
L1-L3 Cache 100’s GB/sec 1-10’s KB |
|
Local Memories ~10GB/sec 10-1000’s MB |
|
|
System Memory 100-1000’s MB/sec Terabytes |
System Memory 100-1000’s MB/sec Terabytes |
Power Consumption
The power consumption of FPGAs compare very favourably to microprocessors. A large FPGA running at full speed typically uses less than 25 W, compared to 100 W or more for a modern microprocessor. Even at moderate acceleration, a FPGA system will use dramatically less electric power than an all microprocessor system with the same performance.|
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Next: Algorithm Development |
